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300 mA, Low Quiescent Current, CMOS Linear Regulator ADP172
FEATURES
Maximum output current: 300 mA Input voltage range: 1.6 V to 3.6 V Low quiescent current IGND = 23 A with 0 mA load IGND = 170 A with 300 mA load Low shutdown current: <1 A Low dropout voltage: 50 mV at 300 mA load Output voltage accuracy: 1% Up to 31 fixed-output voltage options available from 0.8 V to 3.0 V Accuracy over line, load, and temperature: 3% Stable with small 1 F ceramic output capacitor PSRR performance of 70 dB at 10 kHz and 73 dB at 1 kHz Low noise: 30 V rms at VOUT = 0.8 V Current limit and thermal overload protection Logic-controlled enable Tiny 4-ball, 0.5 mm pitch WLCSP package
TYPICAL APPLICATION CIRCUITS
VIN = 2.3V C1 ON OFF EN VIN VOUT U1 GND VOUT = 1.8V C2
06111-001
Figure 1. ADP172 with Fixed Output Voltage, 1.8 V
APPLICATIONS
Mobile phones Digital camera and audio devices Portable and battery-powered equipment DSP/FPGA/microprocessor supplies Post dc-to-dc regulation
GENERAL DESCRIPTION
The ADP172 is a low voltage input, low quiescent current, lowdropout (LDO) linear regulator that operates from 1.6 V to 3.6 V and provides up to 300 mA of output current. The low 50 mV dropout voltage at 300 mA load improves efficiency and allows operation over a wide input voltage range. The low 23 A of quiescent current at no load makes the ADP172 ideal for battery-operated portable equipment. The ADP172 is capable of 31 fixed-output voltage options, ranging from 0.8 V to 3.0 V. The ADP172 is optimized for stable operation with small 1 F ceramic output capacitors. Ideal for powering digital processors, the ADP172 exhibits good transient performance and occupies minimal board space. Compared with commodity-type LDOs, the ADP172 provides 20 dB to 40 dB better power supply rejection ratio (PSRR) at 100 kHz, making the ADP172 an ideal power source for analog-to-digital converter (ADC) mixed-signal processor systems and allowing use of smaller size bypass capacitors. In addition, low output noise performance without the need for an additional bypass capacitor further reduces printed circuit board (PCB) component count. Short-circuit protection and thermal overload protection circuits prevent damage in adverse conditions. The ADP172 is available in a tiny 4-ball, 0.5 mm pitch WLCSP for the smallest footprint solution to meet a variety of portable power applications.
Rev. B
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ADP172 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 Typical Application Circuits............................................................ 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Input and Output Capacitor, Recommended Specifications .. 4 Absolute Maximum Ratings............................................................ 5 Thermal Data ................................................................................ 5 Thermal Resistance ...................................................................... 5 ESD Caution .................................................................................. 5 Pin Configuration and Function Descriptions ............................. 6 Typical Performance Characteristics ..............................................7 Theory of Operation ...................................................................... 11 Applications Information .............................................................. 12 Capacitor Selection .................................................................... 12 Undervoltage Lockout ............................................................... 13 Enable Feature ............................................................................ 13 Current Limit and Thermal Overload Protection ................. 14 Thermal Considerations............................................................ 14 Printed Circuit Board Layout Considerations ....................... 16 Outline Dimensions ....................................................................... 17 Ordering Guide .......................................................................... 17
REVISION HISTORY
5/10--Rev. A to Rev. B Changes to Figure 1 .......................................................................... 1 4/10--Rev. 0 to Rev. A Changes to Ordering Guide .......................................................... 17 2/10--Revision 0: Initial Version
Rev. B | Page 2 of 20
ADP172 SPECIFICATIONS
VIN = (VOUT + 0.4 V) or 1.6 V (whichever is greater), EN = VIN, IOUT = 10 mA, CIN = COUT = 1 F, TA = 25C, unless otherwise noted. Table 1.
Parameter INPUT VOLTAGE RANGE OPERATING SUPPLY CURRENT 1 Symbol VIN IGND Conditions TJ = -40C to +125C IOUT = 0 A IOUT = 0 A, TJ = -40C to +125C IOUT = 1 mA IOUT = 1 mA, TJ = -40C to +125C IOUT = 150 mA IOUT = 150 mA, TJ = -40C to +125C IOUT = 300 mA IOUT = 300 mA, TJ = -40C to +125C EN = GND EN = GND, VIN = 3.6 V, TJ = -40C to +85C EN = GND, VIN = 3.6 V, TJ = 85C to 125C IOUT = 10 mA 1 mA < IOUT < 300 mA, VIN = (VOUT + 0.5 V) to 3.6 V 1 mA < IOUT < 300 mA, VIN = (VOUT + 0.5 V) to 3.6 V, TJ = -40C to +125C VIN = (VOUT + 0.5 V) to 3.6 V, TJ = -40C to +125C IOUT = 1 mA to 300 mA IOUT = 1 mA to 300 mA, TJ = -40C to +125C IOUT = 10 mA, VOUT 1.8 V IOUT = 10 mA, VOUT 1.8 V, TJ = -40C to +125C IOUT = 150 mA, VOUT 1.8 V IOUT = 150 mA, VOUT 1.8 V, TJ = -40C to +125C IOUT = 300 mA, VOUT 1.8 V IOUT = 300 mA, VOUT 1.8 V, TJ = -40C to +125C VOUT = 1.8 V Min 1.6 Typ 23 60 50 100 130 210 170 260 0.1 2 25 +1 +1.5 +1.5 +0.25 0.001 0.005 2 7 25 50 50 100 400 TJ rising 120 450 150 15 1.2 0.4 0.1 1 1.5 0.7 80 72 50 40 30 800 Max 3.6 Unit V A A A A A A A A A A A % % % %/V %/mA %/mA mV mV mV mV mV mV s mA C C V V A A V V mV V rms V rms V rms V rms
SHUTDOWN CURRENT
IGND-SD
OUTPUT VOLTAGE ACCURACY
VOUT
-1 -2 -3 -0.25
LINE REGULATION LOAD REGULATION 2 DROPOUT VOLTAGE 3
VOUT/VIN VOUT/IOUT VDROPOUT
START-UP TIME 4 CURRENT-LIMIT THRESHOLD 5 THERMAL SHUTDOWN Thermal Shutdown Threshold Thermal Shutdown Hysteresis EN INPUT Logic High Voltage Logic Low Voltage Leakage Current Voltage UNDERVOLTAGE LOCKOUT Input Voltage Rising Input Voltage Falling Hysteresis OUTPUT NOISE
tSTART-UP ILIMIT TSSD TSSD-HYS VIH VIL VI-LEAKAGE UVLO UVLORISE UVLOFALL UVLOHYS OUTNOISE
1.6 V VIN 3.6 V 1.6 V VIN 3.6 V EN = VIN or GND EN = VIN or GND, TJ = -40C to +125C TJ = -40C to +125C TJ = -40C to +125C 10 Hz to 100 kHz, VIN = 3.6 V, VOUT = 3.0 V 10 Hz to 100 kHz, VIN = 3.6 V, VOUT = 1.8 V 10 Hz to 100 kHz, VIN = 3.6 V, VOUT = 1.2 V 10 Hz to 100 kHz, VIN = 3.6 V, VOUT = 0.8 V
Rev. B | Page 3 of 20
ADP172
Parameter POWER SUPPLY REJECTION RATIO Symbol PSRR Conditions 1 kHz, VIN = 3.6 V, IOUT = 10 mA, VOUT = 0.8 V 10 kHz, VIN = 3.6 V, IOUT = 10 mA, VOUT = 0.8 V 10 kHz, VIN = (VOUT + 1 V), IOUT = 10 mA to 300 mA 100 kHz, VIN = (VOUT + 1 V), IOUT = 10 mA to 300 mA Min Typ 73 70 50 47 Max Unit dB dB dB dB
1 2 3
The current from the external resistor divider network in the case of adjustable voltage output (as with the ADP172) should be subtracted from the ground current measured. Based on an end-point calculation using 1 mA and 300 mA loads. See Figure 4 for typical load regulation performance for loads less than 1 mA. Applies only for output voltages above 1.6 V. Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. 4 Start-up time is defined as the time between the rising edge of EN and VOUT at 90% of its nominal value. 5 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V, or 2.7 V.
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS
Table 2.
Parameter MINIMUM INPUT AND OUTPUT CAPACITANCE 1 CAPACITOR ESR
1
Symbol CMIN RESR
Conditions TJ = -40C to +125C TJ = -40C to +125C
Min 0.45 0.001
Typ
Max
Unit F
1
The minimum input and output capacitance should be greater than 0.45 F over the full range of operating conditions. The full range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended; Y5V and Z5U capacitors are not recommended for use with any LDO.
Rev. B | Page 4 of 20
ADP172 ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter VIN to GND VOUT to GND EN to GND Storage Temperature Range Operating Junction Temperature Range Operating Ambient Temperature Range Soldering Conditions Rating -0.3 V to +4.0 V -0.3 V to VIN -0.3 V to +4.0 V -65C to +150C -40C to +125C -40C to +85C JEDEC J-STD-020
the application and board layout. In applications where high maximum power dissipation exists, close attention to thermal board design is required. The value of JA may vary, depending on PCB material, layout, and environmental conditions. The specified values of JA are based on a 4-layer, 4 in. x 3 in. PCB. Refer to JESD51-7 for detailed information regarding board construction. JB is the junction-to-board thermal characterization parameter with units of C/W. The JB of the package is based on modeling and calculation using a 4-layer board. The Guidelines for Reporting and Using Electronic Package Thermal Information: JESD51-12 states that thermal characterization parameters are not the same as thermal resistances. JB measures the component power flowing through multiple thermal paths rather than a single path as in thermal resistance, JB. Therefore, JB thermal paths include convection from the top of the package as well as radiation from the package--factors that make JB more useful in real-world applications. Maximum junction temperature (TJ) is calculated from the board temperature (TB) and power dissipation (PD) using the formula TJ = TB + (PD x JB) Refer to JESD51-8 and JESD51-12 for more detailed information about JB.
Stresses above those listed under absolute maximum ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
THERMAL DATA
Absolute maximum ratings apply only individually, not in combination. The ADP172 can be damaged when the junction temperature limits are exceeded. Monitoring ambient temperature does not guarantee that TJ is within the specified temperature limits. In applications with high power dissipation and poor thermal resistance, the maximum ambient temperature may have to be derated. In applications with moderate power dissipation and low PCB thermal resistance, the maximum ambient temperature can exceed the maximum limit as long as the junction temperature is within specification limits. The junction temperature (TJ) of the device is dependent on the ambient temperature (TA), the power dissipation of the device (PD), and the junction-toambient thermal resistance of the package (JA). Maximum junction temperature (TJ) is calculated from the ambient temperature (TA) and power dissipation (PD) using the following formula: TJ = TA + (PD x JA) Junction-to-ambient thermal resistance (JA) of the package is based on modeling and calculation using a 4-layer board. The junction-to-ambient thermal resistance is highly dependent on
THERMAL RESISTANCE
JA and JB are specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 4. Thermal Resistance
Package Type 4-Ball, 0.5 mm Pitch WLCSP JA 260 JB 58 Unit C/W
ESD CAUTION
Rev. B | Page 5 of 20
ADP172 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
BALL 1 INDICATOR 1 VIN A
06111-002
2 VOUT
EN B
GND
TOP VIEW (BALL SIDE DOWN) Not to Scale
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. A1 A2 B1 B2 Mnemonic VIN VOUT EN GND Description Regulator Input Supply. Bypass VIN to GND with a 1 F or greater capacitor. Output Voltage Adjust Input. Connect the midpoint of an external divider from VOUT to GND to this pin to set the output voltage Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic startup, connect EN to VIN. Ground.
Rev. B | Page 6 of 20
ADP172 TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 3.6 V, VOUT = 1.8 V, IOUT = 10 mA, CIN = COUT = 1 F, TA = 25C, unless otherwise noted.
1.810 1.805 1.800 1.795 200 180 160 ILOAD = 300mA
GROUND CURRENT (A)
140 120 100 80 60 40 20 ILOAD = 10mA ILOAD = 1mA ILOAD = 100A ILOAD = 10A -40 -5 25 85 125
06111-008
VOUT (V)
ILOAD = 100mA
1.790 1.785 1.780 1.775 1.770 ILOAD = 100A ILOAD = 1mA ILOAD = 10mA ILOAD = 100mA ILOAD = 200mA ILOAD = 300mA -40 -5 25 85 125
06111-005
0
JUNCTION TEMPERATURE (C)
JUNCTION TEMPERATURE (C)
Figure 3. Output Voltage vs. Junction Temperature
Figure 6. Ground Current vs. Junction Temperature
1.804
180 160
1.803 140 1.802
GROUND CURRENT (A)
06111-006
120 100 80 60 40
VOUT (V)
1.801
1.800
1.799 20
06111-009
1.798 0.01
0.1
1
10
100
1000
0 0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
Figure 4. Output Voltage vs. Load Current
Figure 7. Ground Current vs. Load Current
1.805 1.804 1.803 1.802 1.801 1.800 1.799 1.798 2.1 ILOAD = 100A ILOAD = 1mA 2.3 2.5 2.7 ILOAD = 10mA ILOAD = 100mA 2.9 VIN (V) 3.1 ILOAD = 200mA ILOAD = 300mA
06111-007
180 160 140 ILOAD = 300mA ILOAD = 100mA
GROUND CURRENT (A)
120 100 80 60 40 20 ILOAD = 10A 2.1 2.3 2.5 2.7 2.9 VIN (V) 3.1 3.3 3.5
06111-010
VOUT (V)
ILOAD = 10mA
ILOAD = 1mA ILOAD = 100A
3.3
3.5
0
Figure 5. Output Voltage vs. Input Voltage
Figure 8. Ground Current vs. Input Voltage
Rev. B | Page 7 of 20
ADP172
5.0 4.5 4.0 VIN = 2.1V VIN = 2.3V VIN = 2.7V VIN = 2.9V VIN = 3.2V VIN = 3.4V VIN = 3.5V VIN = 3.6V
400 350 300 250 200 150 100 50 0 1.5 ILOAD = 1mA ILOAD = 10mA ILOAD = 100mA ILOAD = 200mA ILOAD = 300mA 1.6 1.7 VIN (V) 1.8 1.9 2.0
06111-014
SHUTDOWN CURRENT (A)
3.5 3.0 2.5 2.0 1.5 1.0 0.5
-25
0
25 50 75 TEMPERATURE (C)
100
125
06111-011
0 -50
GROUND CURRENT (A)
Figure 9. Shutdown Current vs. Temperature at Various Input Voltages
Figure 12. Ground Current vs. Input Voltage (in Dropout)
70 60 TA = 25C
-30 300mA 200mA 100mA 10mA 1mA
-40
DROPOUT VOLTAGE (mV)
50 40 30 20 10 0 0.1
-50
PSRR (dB)
-60
-70
-80
1
10 LOAD CURRENT (mA)
100
1000
06111-012
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 10. Dropout Voltage vs. Load Current
Figure 13. Power Supply Rejection Ratio vs. Frequency, VOUT = 0.8 V
1.85 1.80 1.75
-30 300mA 200mA 100mA 10mA 1mA
-40
-50
VOUT (V)
1.70 1.65 1.60 1.55 1.50 1.55 ILOAD = 1mA ILOAD = 10mA ILOAD = 100mA ILOAD = 200mA ILOAD = 300mA
PSRR (dB)
-60
-70
-80
06111-013
1.60
1.65
1.70
1.75
1.80
1.85
1.90
100
1k
10k
100k
1M
10M
VIN (V)
FREQUENCY (Hz)
Figure 11. Output Voltage vs. Input Voltage (in Dropout)
Figure 14. Power Supply Rejection Ratio vs. Frequency, VOUT = 1.8 V
Rev. B | Page 8 of 20
06111-016
-90 10
06111-015
-90 10
ADP172
-30
70 3V 60 50
-40
RMS NOISE (V)
-50
PSRR (dB)
40 30 20 10 0 0.001
1.8V
-60
-70
300mA 200mA 100mA 10mA 1mA
0.8V
-80
0.01
FREQUENCY (Hz)
0.1 1 10 LOAD CURRENT (mA)
100
1000
Figure 15. Power Supply Rejection Ratio vs. Frequency, VOUT = 3.0 V
Figure 18. RMS Noise vs. Load Current and Output Voltage
-30 3V, 1mA 1.8V, 1mA 0.8V, 1mA 3V, 300mA 1.8V, 300mA 0.8V, 300mA
ILOAD
1
-40
1mA TO 300mA LOAD STEP, 2.5A/s
-50
PSRR (dB)
-60
VOUT
2
-70
-80
VIN = 3.6V VOUT = 1.8V
06111-118
100
1k
10k
100k
1M
10M
CH1 200mA
CH2 50.0mV
B W
FREQUENCY (Hz)
M40.00s A CH1 T 160.680s
124mA
Figure 16. Power Supply Rejection Ratio vs. Frequency, Various Output Voltages and Load Currents
Figure 19. Load Transient Response, CIN and COUT = 1 F
10
ILOAD
1
1mA TO 300mA LOAD STEP, 2.5A/s
NOISE (V/Hz)
1 0.8V 1.8V 3.0V
2
VOUT
0.1
VIN = 3.6V ILOAD = 10mA COUT = 1F 100 1k FREQUENCY (Hz) 10k 100k
06111-019
VIN = 3.6V VOUT = 1.8V CH1 200mA CH2 50.0mV
B W
M40.0s A CH1 T 159.800s
204mA
Figure 17. Output Noise Spectrum
Figure 20. Load Transient Response, CIN and COUT = 4.7 F
Rev. B | Page 9 of 20
06111-122
0.01 10
06111-121
-90 10
06111-020
100
1k
10k
100k
1M
10M
06111-017
-90 10
ADP172
VIN 2.6V TO 3.6V INPUT VOLTAGE STEP, 2V/s VIN 2.6V TO 3.6V INPUT VOLTAGE STEP 2V/s
1 2
1
VOUT
2
VOUT
VOUT = 1.8V CIN = COUT = 1F
06111-123
VOUT = 1.8V CIN = COUT = 1F CH1 1.00V CH2 10.0mV
B W
CH1 1.00V
CH2 10.0mV
M10.0s A CH1 T 39.3000%
2.94V
M10.0s A CH1 T 39.3000s
2.94V
Figure 21. Line Transient Response, Load Current = 1 mA
Figure 22. Line Transient Response, Load Current = 300 mA
Rev. B | Page 10 of 20
06111-124
ADP172 THEORY OF OPERATION
The ADP172 is a low quiescent current, low-dropout linear regulator that operates from 1.6 V to 3.6 V and can provide up to 300 mA of output current. Drawing a low 170 A of quiescent current (typical) at full load makes the ADP172 ideal for batteryoperated portable equipment. Shutdown current consumption is typically 100 nA. Optimized for use with small 1 F ceramic capacitors, the ADP172 provides excellent transient performance.
ADP172
VIN VOUT
Internally, the ADP172 consists of a reference, an error amplifier, a feedback voltage divider, and a PMOS pass transistor. Output current is delivered via the PMOS pass device, which is controlled by the error amplifier. The error amplifier compares the reference voltage with the feedback voltage from the output and amplifies the difference. If the feedback voltage is lower than the reference voltage, the gate of the PMOS device is pulled lower, allowing more current to pass and increasing the output voltage. If the feedback voltage is higher than the reference voltage, the gate of the PMOS device is pulled higher, allowing less current to pass and decreasing the output voltage. The ADP172 uses the EN pin to enable and disable the VOUT pin under normal operating conditions. When EN is high, VOUT turns on; when EN is low, VOUT turns off. For automatic startup, EN can be tied to VIN.
R1 GND SHORT CIRCUIT, UVLO AND THERMAL PROTECT
EN
SHUTDOWN
0.5V REFERENCE
R2
06111-022
Figure 23. ADP172 Internal Block Diagram
Rev. B | Page 11 of 20
ADP172 APPLICATIONS INFORMATION
CAPACITOR SELECTION
Output Capacitor
The ADP172 is designed for operation with small, space-saving ceramic capacitors but functions with most commonly used capacitors as long as care is taken with the effective series resistance (ESR) value. The ESR of the output capacitor affects the stability of the LDO control loop. A minimum of 1 F capacitance with an ESR of 1 or less is recommended to ensure the stability of the ADP172. The transient response to changes in load current is also affected by output capacitance. Using a larger value of output capacitance improves the transient response of the ADP172 to large changes in load current. Figure 24 and Figure 25 show the transient responses for output capacitance values of 1 F and 4.7 F, respectively.
ILOAD 1mA TO 300mA LOAD STEP, 2.5A/s
1
Input Bypass Capacitor
Connecting a 1 F capacitor from VIN to GND reduces the circuit sensitivity to the printed circuit board (PCB) layout, especially when long input traces or high source impedance is encountered. If greater than 1 F of output capacitance is required, the input capacitor should be increased to match it.
Input and Output Capacitor Properties
Any good quality ceramic capacitor can be used with the ADP172, as long as it meets the minimum capacitance and maximum ESR requirements. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. Capacitors must have a dielectric adequate to ensure the minimum capacitance over the necessary temperature range and dc bias conditions. An X5R or X7R dielectric with a voltage rating of 6.3 V or 10 V is recommended. The Y5V and Z5U dielectrics are not recommended due to their poor temperature and dc bias characteristics. Figure 26 depicts the capacitance vs. bias voltage characteristics of a 0402, 1 F, 10 V X5R capacitor. The variance of a capacitor is strongly influenced by the capacitor size and voltage rating. In general, a capacitor in a larger package or with a higher voltage rating exhibits less capacitance variance over bias voltage. The temperature variation of the X5R dielectric is about 15% over the -40C to +85C temperature range and is not a function of package or voltage rating.
2
VOUT VOUT = 1.8V CIN = COUT = 1F CH1 200mA CH2 50.0mV
B W
M200ns A CH1 T 500.000ns
112mA
06111-125
1.2
Figure 24. Output Transient Response, COUT = 1 F
CAPACITANCE (F)
ILOAD
1
1.0
0.8
1mA TO 300mA LOAD STEP, 2.5A/s
0.6
0.4
0.2
2
06111-025
VOUT
0
0
2
4
6
8
10
VOUT = 1.8V CIN = COUT = 4.7F
06111-126
BIAS VOLTAGE (V)
Figure 26. Capacitance vs. Bias Voltage Characteristics
CH1 200mA CH2 50.0mV
B W
M200ns A CH1 T 500.000ns
108mA
Figure 25. Output Transient Response, COUT = 4.7 F
Use Equation 1 to determine the worst-case capacitance, accounting for capacitor variation over temperature, component tolerance, and voltage. CEFF = CBIAS x (1 - TEMPCO) x (1 - TOL) where: CBIAS is the effective capacitance at the operating voltage. TEMPCO is the worst-case capacitor temperature coefficient. TOL is the worst-case component tolerance. (1)
Rev. B | Page 12 of 20
ADP172
In this example, the worst-case temperature coefficient (TEMPCO) over -40C to +85C is assumed to be 15% for an X5R dielectric. The tolerance of the capacitor (TOL) is assumed to be 10%, and CBIAS is 0.94 F at 1.8 V, as shown in Figure 26. Substituting these values in Equation 1 yields CEFF = 0.94 F x (1 - 0.15) x (1 - 0.1) = 0.719 F Therefore, the capacitor chosen in this example meets the minimum capacitance requirement of the LDO over temperature and tolerance at the chosen output voltage. To guarantee the performance of the ADP172, it is imperative that the effects of dc bias, temperature, and tolerances on the behavior of the capacitors be evaluated for each application.
TYPICAL EN TRESHOLDS (V)
The EN pin active/inactive thresholds are derived from the VIN voltage. Therefore, these thresholds vary with changing input voltage. Figure 28 shows typical EN active/inactive thresholds when the input voltage varies from 1.6 V to 3.6 V.
1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 EN INACTIVE EN ACTIVE
UNDERVOLTAGE LOCKOUT
The ADP172 has an internal undervoltage lockout circuit that disables all inputs and the output when the input voltage is less than approximately 1.2 V. This ensures that the ADP172 inputs and the output behave in a predictable manner during power-up.
1.50
1.65
1.80
1.95
2.10
2.25
2.40
2.55
2.70
2.85
3.00
3.15
3.30
3.45
3.60
06111-130
VIN (V)
ENABLE FEATURE
The ADP172 uses the EN pin to enable and disable the VOUT pin under normal operating conditions. As shown in Figure 27, when a rising voltage on EN crosses the active threshold, VOUT turns on. When a falling voltage on EN crosses the inactive threshold, VOUT turns off.
3.5 3.0 2.5 2.0
Figure 28. Typical EN Pin Thresholds vs. Input Voltage
The ADP172 uses an internal soft start to limit the inrush current when the output is enabled. The start-up time for the 1.8 V option is approximately 120 s from the time the EN active threshold is crossed to when the output reaches 90% of its final value. As shown in Figure 29, the start-up time is dependent on the output voltage setting.
EN VOUT = 3.0V
VOUT
VOUT = 1.8V
1.5
1 2
VOUT = 0.8V
1.0 0.5 0
0
0.2
0.4
0.6
0.8 VEN
1.0
1.2
1.4
1.6
06111-230
CH1 1.00V
CH2 1.00V
B W
M20.0s A CH1 T 79.8000s
2.72V
Figure 27. ADP172 Typical EN Pin Operation
Figure 29. Typical Start-Up Time
As shown in Figure 27, the EN pin has hysteresis built in. This prevents on/off oscillations that can occur due to noise on the EN pin as it passes through the threshold points.
Rev. B | Page 13 of 20
06111-129
ADP172
CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION
The ADP172 is protected against damage due to excessive power dissipation by current and thermal overload protection circuits. The ADP172 is designed to limit the current when the output load reaches 450 mA (typical). When the output load exceeds 450 mA, the output voltage is reduced to maintain a constant current limit. Thermal overload protection is included, which limits the junction temperature to a maximum of 150C (typical). Under extreme conditions (that is, high ambient temperature and power dissipation), when the junction temperature starts to rise above 150C, the output is turned off, reducing the output current to 0. When the junction temperature drops below 135C, the output is turned on again, and output current is restored to its nominal value. Consider the case where a hard short from VOUT to GND occurs. At first, the ADP172 limits the current so that only 450 mA is conducted into the short. If self-heating of the junction is great enough to cause its temperature to rise above 150C, thermal shutdown activates, turning off the output and reducing the output current to 0. As the junction temperature cools and drops below 135C, the output turns on and conducts 450 mA into the short, again causing the junction temperature to rise above 150C. This thermal oscillation between 135C and 150C causes a current oscillation between 450 mA and 0 mA, which continues as long as the short remains at the output. Current and thermal limit protections are intended to protect the device against accidental overload conditions. The junction temperature of the ADP172 can be calculated from the following equation: TJ = TA + (PD x JA) where: TA is the ambient temperature. PD is the power dissipation in the die, given by PD = [(VIN - VOUT) x ILOAD] + (VIN x IGND) where: ILOAD is the load current. IGND is the ground current. VIN and VOUT are input and output voltages, respectively. Power dissipation due to ground current is quite small and can be ignored. Therefore, the junction temperature equation simplifies to the following: TJ = TA + {[(VIN - VOUT) x ILOAD] x JA} (4) As shown in Equation 4, for a given ambient temperature, inputto-output voltage differential, and continuous load current, there exists a minimum copper size requirement for the PCB to ensure that the junction temperature does not rise above 125C. Figure 30 to Figure 35 show junction temperature calculations for different ambient temperatures, load currents, VIN to VOUT differentials, and areas of PCB copper.
140 TJ MAX
JUNCTION TEMPERATURE, TJ (C)
(2)
(3)
120 100
ILOAD = 300mA
ILOAD = 200mA 80 60 40 20 ILOAD = 100mA ILOAD = 50mA ILOAD = 10mA ILOAD = 1mA
THERMAL CONSIDERATIONS
To guarantee reliable operation, the junction temperature of the ADP172 must not exceed 125C. To ensure that the junction temperature stays below this maximum value, the user must be aware of the parameters that contribute to junction temperature changes. These parameters include ambient temperature, power dissipation in the power device, and thermal resistances between the junction and ambient air (JA). The JA number is dependent on the package assembly compounds used and the amount of copper to which the GND pin of the package is soldered on the PCB. Table 6 shows typical JA values of the 4-ball WLCSP package for various PCB copper sizes. Table 6. Typical JA Values
Copper Size (mm2) 01 50 100 300 500
1
VIN - VOUT (V)
Figure 30. 500 mm2 of PCB Copper, TA = 25C
JA (C/W) 260 159 157 153 151
Device soldered to minimum size pin traces.
Rev. B | Page 14 of 20
06111-030
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ADP172
140 TJ MAX
JUNCTION TEMPERATURE, TJ (C) JUNCTION TEMPERATURE, TJ (C)
140 TJ MAX 120 ILOAD = 300mA 100 80 60 40 20 ILOAD = 200mA ILOAD = 100mA ILOAD = 50mA ILOAD = 10mA ILOAD = 1mA
120 ILOAD = 300mA 100 80 60 40 20 ILOAD = 100mA ILOAD = 50mA ILOAD = 10mA ILOAD = 1mA ILOAD = 200mA
06111-031
VIN - VOUT (V)
VIN - VOUT (V)
Figure 31. 100 mm2 of PCB Copper, TA = 25C
140 TJ MAX
JUNCTION TEMPERATURE, TJ (C)
Figure 34. 100 mm2 of PCB Copper, TA = 50C
140 TJ MAX
JUNCTION TEMPERATURE, TJ (C)
120 ILOAD = 300mA 100 80 60 40 20 ILOAD = 200mA ILOAD = 100mA ILOAD = 50mA
120 ILOAD = 300mA 100 80 60 40 20
ILOAD = 200mA ILOAD = 100mA ILOAD = 50mA
ILOAD = 10mA ILOAD = 1mA
ILOAD = 10mA ILOAD = 1mA
06111-032
VIN - VOUT (V)
VIN - VOUT (V)
Figure 32. 0 mm2 of PCB Copper, TA = 25C
140 TJ MAX
JUNCTION TEMPERATURE, TJ (C)
Figure 35. 0 mm2 of PCB Copper, TA = 50C
120 ILOAD = 300mA 100 80 60 40 20 ILOAD = 200mA ILOAD = 100mA ILOAD = 50mA ILOAD = 10mA ILOAD = 1mA
In cases where board temperature is known, use the thermal characterization parameter, JB, to estimate the junction temperature rise (see Figure 36). Maximum junction temperature (TJ) is calculated from the board temperature (TB) and power dissipation (PD) using the following formula: TJ = TB + (PD x JB)
140 TJ MAX
JUNCTION TEMPERATURE, TJ (C)
06111-035
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(5)
The typical value of JB is 58C/W for the 4-Ball WLCSP package.
120 100 80 60 40 20
ILOAD = 300mA
VIN - VOUT (V)
06111-033
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ILOAD = 200mA ILOAD = 10mA ILOAD = 100mA ILOAD = 1mA ILOAD = 50mA
Figure 33. 500 mm2 of PCB Copper, TA = 50C
VIN - VOUT (V)
Figure 36. TA = 85C
Rev. B | Page 15 of 20
06111-036
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ADP172
PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS
Heat dissipation from the package can be improved by increasing the amount of copper attached to the pins of the ADP172. However, as can be seen from Table 6, a point of diminishing returns is eventually reached, beyond which an increase in the copper size does not yield significant heat dissipation benefits. Place the input capacitor as close as possible to the VIN and GND pins. Place the output capacitor as close as possible to the VOUT and GND pins. Use of 0402 or 0603 size capacitors and resistors achieves the smallest possible footprint solution for boards on which area is limited.
06111-037
Figure 37. Example ADP172 PCB Layout
Rev. B | Page 16 of 20
ADP172 OUTLINE DIMENSIONS
0.990 0.950 0.910 0.370 0.355 0.340 0.640 0.595 0.550 SEATING PLANE 0.340 0.320 0.300 0.50 REF TOP VIEW
(BALL SIDE DOWN)
2
1 A
BALL A1 IDENTIFIER
1.065 1.025 0.985
B
0.270 0.240 0.210
BOTTOM VIEW
(BALL SIDE UP)
Figure 38. 4-Ball, Wafer Level Chip Scale Package [WLCSP] (CB-4-4) Dimensions show in millimeters
ORDERING GUIDE
Model 1 ADP172ACBZ-1.0-R7 ADP172ACBZ-1.2-R7 ADP172ACBZ-1.26-R7 ADP172ACBZ-1.5-R7 ADP172ACBZ-1.8-R7 ADP172ACBZ-2.1-R7 ADP172ACBZ-3.0-R7
1 2
110309-A
0.05 NOM COPLANARITY
Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C
Output Voltage (V) 2 1.0 1.2 1.26 1.5 1.8 2.1 3.0
Package Description 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP
Package Option CB-4-4 CB-4-4 CB-4-4 CB-4-4 CB-4-4 CB-4-4 CB-4-4
Branding 6V 51 6E 5J 5X 6B 6Z
Z = RoHS Compliant Part. For additional voltage options, contact your local Analog Devices, Inc., sales or distribution representative.
Rev. B | Page 17 of 20
ADP172 NOTES
Rev. B | Page 18 of 20
ADP172 NOTES
Rev. B | Page 19 of 20
ADP172 NOTES
(c)2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06111-0-5/10(B)
Rev. B | Page 20 of 20

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